Multiplikasjonskrets for IEEE-754 flyttall optimalisert for gjennomstrømning
dc.contributor | Gundersen, Rune | en_GB |
dc.contributor | Blom, Harald | en_GB |
dc.date.accessioned | 2018-11-07T13:42:39Z | |
dc.date.available | 2018-11-07T13:42:39Z | |
dc.date.issued | 2000 | |
dc.identifier | 726 | |
dc.identifier.isbn | 82-464-0402-4 | en_GB |
dc.identifier.other | 2000/00491 | |
dc.identifier.uri | http://hdl.handle.net/20.500.12242/2009 | |
dc.description.abstract | This report contains a discription of a floting point adder optimized for throughput, rather than latecy. It is confirm with IEEE-754 standard for binary floting—point atrithmetic. The design is fully tested and verified. Synthetesis results for the Alcatel Mietec MTC45000 technology is presented. | en_GB |
dc.language.iso | nob | en_GB |
dc.title | Multiplikasjonskrets for IEEE-754 flyttall optimalisert for gjennomstrømning | en_GB |
dc.subject.keyword | Integrerte kretser | en_GB |
dc.source.issue | 2000/00491 | en_GB |
dc.source.pagenumber | 114 | en_GB |