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dc.contributorGundersen, Runeen_GB
dc.contributorBlom, Haralden_GB
dc.date.accessioned2018-11-07T13:42:39Z
dc.date.available2018-11-07T13:42:39Z
dc.date.issued2000
dc.identifier726
dc.identifier.isbn82-464-0402-4en_GB
dc.identifier.other2000/00491
dc.identifier.urihttp://hdl.handle.net/20.500.12242/2009
dc.description.abstractThis report contains a discription of a floting point adder optimized for throughput, rather than latecy. It is confirm with IEEE-754 standard for binary floting—point atrithmetic. The design is fully tested and verified. Synthetesis results for the Alcatel Mietec MTC45000 technology is presented.en_GB
dc.language.isonoben_GB
dc.titleMultiplikasjonskrets for IEEE-754 flyttall optimalisert for gjennomstrømningen_GB
dc.subject.keywordIntegrerte kretseren_GB
dc.source.issue2000/00491en_GB
dc.source.pagenumber114en_GB


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